Sunday, February 19, 2012: 1:30 PM
Ballroom A (VCC West Building)
Moore’s Law is connected to a fundamental premise, known as the Learning Curve which relates decreases in the cost of an entity to corresponding increases in the volume of production of that entity. It states that the cost-per-unit decreases by a fixed percent every time total cumulative volume doubles. This is applicable across a wide range of products but the striking difference for semiconductors is that the rate of decrease in cost-per-unit for semiconductor chips has occurred at a much higher rate than for many other industries, driven primarily by feature size scaling (Moore’s Law) and the desire of consumers for new features. It is argued in this presentation that the application space for semiconductor chips is rapidly increasing and that it is likely that the Learning Curve benefits of Moore’s Law will continue for at least one more decade, perhaps much longer. What will happen when feature scaling is no longer physically possible and when the rate of growth for applications of conventional semiconductors slows? It is argued that new device and interconnect structures will emerge to support highly functional and efficient non-conventional architectures and the Learning Curve for semiconductors will continue.