Lessons from Building a Global Technological Roadmap at the Innovation Frontier

Friday, 14 February 2014
Grand Ballroom C North (Hyatt Regency Chicago)
Paolo Gargini , Stanford University, Stanford, CA
"Lessons Learned from Building a

Global Technological Roadmap at the Innovation Frontier.”

Paolo A. Gargini

Chairman ITRS

IEEE Fellow

Revolutionary inventions often occur in the most unexpected ways. The quest for a solid state, single charge-type MOS transistor initiated in the mid-40s at the Bell Labs led to the discovery of an unexpected bipolar transistor. It took two more decades after this invention until the “Silicon Gate Process” finally made the MOS transistor a reality. In the subsequent 10 years the modern semiconductor industry became a reality.

The industry continued to expand at “double digit” growth rates in the 80s until the incubation time necessary to introduce new technological process steps into manufacturing made it clean that an innovative and more systematic long-term approach had become necessary.

The first National Technology Roadmap for Semiconductors (NTRS) was published in 1992; the rate of introduction of new DRAM products occurred every 3 years while Non Volatile Memory (NVM) and Logic products were doubling the number of transistors every 2 years. By 1995 it had become clear that some of the fundamental elements of the “Silicon Gate Process” were bound to reach their limits in the next decade. By 2005 the thickness of the gate dielectric was going to reach 0.3nm corresponding solely to a monolayer of dielectric!

This revelation triggered the formation in 1998 of the International Technology Roadmap for Semiconductors (ITRS) with the participation of Europe, Japan, Korea, Taiwan and the US.

The ITRS predicted that it was necessary to drastically innovate and replace all the elements of the original silicon gate transistor except the silicon substrate wafers!

Rebuilding the Bell Labs was no longer cost effective or fast enough for this task. A new research organization consisting of clusters of universities named Focus Centers Research Program (FCRP) was created to address these problems. The research results were then transferred to Sematech and IMEC. By 2003 new transistors emerged from the research laboratories of leading semiconductor companies. By 2007, after 10 years of incubation, the new transistor technology (high-k/metal-gate) was into manufacturing.

The lessons learned from this innovative and globally integrated research methodology consisting of ITRS, University, Consortia, Industry Research and Development, and finally High Volume Manufacturing led in 2005 to the formation of the Nanoelectronics Research Initiative (NRI) aimed at new frontier devices capable of replacing the standard CMOS devices by the year 2020!